Qualcomm said it has entered a multi-generational collaboration with Amazon to develop customized chips for large-scale AI data centers, with the partnership focused on AI inference infrastructure and new optical interconnect technology.

According to Qualcomm, the companies will work on customized chips designed for large-scale AI data centers. The announcement frames the effort around advancing AI inference, an area where efficiency, latency, and operating costs have become central considerations as AI workloads expand.

The collaboration also includes joint development of optical interconnect solutions with capacity of up to 1.6T. That points to a broader infrastructure push beyond processors alone, covering the movement of data between systems that support increasingly demanding AI applications.

Qualcomm said it also plans to use AWS AI infrastructure, including Amazon Bedrock, for electronic design automation workloads as part of an effort to shorten chip design cycles. In practice, that gives the partnership two tracks: Qualcomm supplying customized hardware for AI data centers while also relying on AWS tools and infrastructure in its own design process.

Chief Executive Cristiano Amon said growing AI demand requires breakthroughs in both computing and connectivity. AWS Vice President Prasad Kalyanaraman described the arrangement as an extension of an existing partnership aimed at delivering more efficient and cost-effective infrastructure to customers. Neither company disclosed financial terms, production timelines, or the scale of potential deployment.

Why It Matters

The announcement adds to the broader race to build AI infrastructure that is cheaper to run and more specialized for inference workloads. That is significant because the next phase of AI competition is increasingly tied not only to model quality, but also to how efficiently companies can deliver AI services through cloud and data center systems.

For the industry, the partnership suggests that competition in AI infrastructure is widening across chips, networking, and design tooling at the same time. It also shows large cloud and semiconductor companies looking for tighter integration between compute, connectivity, and development workflows rather than treating them as separate layers.